EDN

Filter banks, part 2: Optimization and synthesis

Before we proceed, let's quickly review our filter bank example. Our example, shown in Figure 1, is a size 16 DFT filter bank. The color scheme shows the sample rate change where a 16 MHz input sample ...
Design-Reuse

Xilinx Enables 300 MSPS Programmable DSP Systems With New Virtex-II Pro FPGAs

New Virtex-II Pro FPGAs deliver DSP performance levels beyond the reach of traditional programmable DSP solutions SAN JOSE, Calif., June 24, 2002 - Xilinx, Inc. (NASDAQ: XLNX) today announced it has ...
Electronic Design

DSP Stands Up To Radiation

Radiation hardened, the RHDSP24 digital-signal processor (DSP) reportedly breaks the computational bottlenecks associated with real-time DSP by reducing software overhead. Demanding tasks such as ...
Design-Reuse

SoCs: DSP World, Cores -> FPGAs cranked for software radio

Software-defined radios are highly configurable hardware platforms that provide the technology for realizing the rapidly expanding third-generation digital wireless communication infrastructure. A ...